Transistors and Logic Gates
A transistor is an electrical device that acts as an electrical switch. A MOSFET transistor has three electrical terminals that control the flow of the current. The Source is where the power enters the transistor. The Drain where the power flows toward. And the Gate that controls whether or not the power gets to make it to the drain.
When the gate of an NMOS transistor has no power it is off. This is shown in the picture to the left. If the nMOS transistor has power it is on. This is shown in the right picture. There is also a PMOS transistor that works in the reverse order of the nMOS transistor. Meaning that if a pMOS transistor has power it is off and if it has no power it is on.
We can combine the two transistors and create a CMOS transistor. In this transistor when the gate has power the pMOS is off and the nMos is on. This means that the total output is zero and the CMOS transistor is off. This is the picture on the left. Now when the gate has no power the pMOS is on and the nMOS is off meaning the CMOS transistor is on. This is the picture in the middle. The right picture is a shorthand version that we can use to represent a CMOS. The CMOS is also called an inverter because whatever input you put in comes out as the inverse. (1 would come out as 0)
Logic Gates
The CMOS leads use to logic gates. Above is another way to represent a CMOS and is called a NOT gate. This is used in logic circuits to invert values.
The next logic gate we will look at is the NAND gate (Not And). On the left, we have the transistor circuit view, and on the right, we have the logic gate version. This gate works by ANDing the two inputs together and outputting the inverse of the result. If both A and B are 1 the AND result would be 1 but we are going to get the inverse so the output will be 0.
Similarly, we have the NOR gate (Not Or). It works the same as the NAND gate except instead of ANDing the inputs together we OR them and take the inverse. So if A is 1 and B is 0 the OR result would be 1 but we get the inverse so the output is 0.
The Picture above shows the basic logic gates which are combined to create boolean functions. This would be called the logic gate level and is an abstraction up from the transistor level meaning that we do not see how the logic gates work under the hood because we know what they do.
CMOS Structure
It is important to remember that all CMOS gates will have a PUN (Pull Up Network) and a PDN (Pull Down Network). If the PUN is on then the gate will have a logical output of 1 and if the PDN is on then the gate has a logical output of 0. The PUN will only have PMOS transistors while the PDN will only have NMOS transistors. It is also important to remember that only one of the networks should be on at one time or the gate will short circuit. Above is an example that shows the structure.
